System management mode (“SMM”) is a special-purpose operating mode available on Intel's IA-32 processors. Its purpose is to provide an alternate operating environment that can be used by firmware to execute proprietary OEM code or to handle system-wide functions like power management or system hardware control. The main benefit of SMM is that it offers an isolated environment so that these types of functions may be performed in a manner that is transparent to the operating system and application software.
SMM may be invoked only by a system management interrupt (“SMI”) presented either at the SMI# pin of the processor or via an SMI message on the processor's advanced programmable interrupt controller (“APIC”) bus. When an SMI occurs, the processor exits its current operating mode to enter SMM mode and then returns to the previous operating mode upon execution of a resume (“RSM”) instruction. Upon entry into SMM, the processor writes its register contents or “state” to a state save area within a segment of memory known as system management RAM (“SMRAM”). Upon returning from SMM, the processor restores its register contents according to information found in the state save area.
An internal SMBASE register is provided in the processor to store the base address of the SMRAM. Thus, SMI interrupt handler code may be stored at SMBASE+8000h in SMRAM, for example, while the state save area may be located at SMBASE+FE00h. While the absolute location of SMRAM may be modified by modifying the value in the SMBASE register, specific offsets within the state save area corresponding to particular register contents depend on the particular processor model and family. In general, they are fixed by Intel and are published by Intel in its IA-32 architecture software developer's manuals. For example, for one Intel processor, CR0 contents are stored at SMBASE+FFFCh in the state save area, EFLAGS contents are stored at SMBASE+FFF4h, and so on.
Some of the more recent IA-32 processors offer Intel's “extended memory 64 technology.” An IA-32 processor that is equipped with extended memory 64 technology (hereinafter “a memory-extended processor”) is capable of running a 64 bit operating system and accessing a 64-bit address space. In addition, such a memory-extended processor's general-purpose registers and instruction pointers are 64-bits wide. While extended memory 64 technology represents progress for the IA-32 architecture, one aspect of extended memory 64 technology is that the map of the state save area to be used during SMM has been changed relative to the map that existed for non-memory-extended IA-32 processors. For example, the offsets for saving the state of particular registers in the state save area have been changed to account for the fact that the registers to be saved are now 64 bits in length rather than 32 bits in length. In addition, memory-extended processors have been equipped with additional registers that non-memory-extended processors did not have.
As a consequence of these changes to the state save area memory map, BIOS firmware designed for non-memory-extended processors will not function properly in memory-extended platforms, and BIOS firmware designed for memory-extended processors will not function properly in non-memory extended platforms. To date, the solution to this problem for PC and workstation manufacturers has been to make at least two different versions of BIOS firmware available so that one version may be installed in non-memory-extended platforms and the other version may be installed in memory-extended platforms. Unfortunately, this solution increases cost because it requires that at least two different versions of the BIOS be maintained and supported.